1. Technical Field
The present invention relates to packaging for integrated circuits (chips) and has particular relation to such packaging in which the chip substrate may be soldered into the package concurrently with the soldering of circuit to the feed throughs of the package.
2. Background Art
Chips and the substrates to which they are bonded are often subjected to harsh environments. It is therefore necessary to hermetically seal them in packages to protect them from such environments, yet simultaneously allow signals to enter and exit the package through various ports in the package.
A major problem in the prior art has been the necessity of connecting the chip/substrate to the ports of the package by fine wires. When the chip/substrate/package combination is subjected to acceleration, vibration, or other stress, these wires can work loose, rendering the combination inoperative.
It is an object of the present invention to eliminate the need for wire bonds.
It is a feature of the present invention that the substrate is soldered to the package.
It is an advantage of the present invention that such soldering of the substrate to package may take place concurrently with the soldering of the feed-throughs of the package, thereby minimizing the number of thermal cycles that the chip or chips and substrate are subjected to.